Electronic Design

A Look Back At Verilog

Never in my wildest dreams did I think that the Verilog hardware description language (HDL) would spawn an industry and be a fixture of electronics design for more than 15 years. HDLs were a ...
EDN

SmartDV Adds Support for Verilator Open Source HDL Verilog Simulator

SmartDV™ Technologies announced support for Verilator, the free, open-source hardware description language (HDL) simulator, becoming the first Verification Intellectual Property (VIP) provider to do ...
Electronic Design

Verilog-AMS Update Integrates With HDL Standard

The latest version of Accellera’s Verilog-Analog Mixed-Signal (AMS) standard, Verilog-AMS 2.3, unifies the standard’s previous version with IEEE Std. 1364-2005, the Verilog hardware description ...
TechRepublic

Design and Testing of Prefix Adder for High Speed Application by Using Verilog HDL

Parallel prefix adder is the most flexible and widely used for binary addition. Parallel prefix adders are best suited for VLSI implementation. Numbers of parallel prefix adder structures have been ...
TechRepublic

FPGA Based Implementation of AES Encryption and Decryption with Verilog HDL

Security is the most important part in data communication system, where more randomization in secret keys increases the security as well as complexity of the cryptography algorithms. As a result in ...
EDN

‘Obfuscators’ render Verilog, VHDL unreadable

Santa Cruz, Calif. — Providing a new approach to intellectual property (IP) protection, software engineering firm Semantic Designs has released production-quality “obfuscators” for Verilog 2001 and ...